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FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
Integrated Device Technology, Inc.
IDT54/74FCT16260AT/CT/ET IDT54/74FCT162260AT/CT/ET
FEATURES:
* Common features: - 0.5 MICRON CMOS Technology - High-speed, low-power CMOS replacement for ABT functions - Typical tSK(o) (Output Skew) < 250ps - Low input and output leakage 1A (max.) - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) - Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack - Extended commercial range of -40C to +85C - VCC = 5V 10% * Features for FCT16260AT/CT/ET: - High drive outputs (-32mA IOH, 64mA IOL) - Power off disable outputs permit "live insertion" - Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25C * Features for FCT162260AT/CT/ET: - Balanced Output Drivers: 24mA (commercial), 16mA (military) - Reduced system switching noise - Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25C
DESCRIPTION:
The FCT16260AT/CT/ET and the FCT162260AT/CT/ET Tri-Port Bus Exchangers are high-speed 12-bit latched bus multiplexers/transceivers for use in high-speed microprocessor applications. These Bus Exchangers support memory interleaving with latched outputs on the B ports and address multiplexing with latched inputs on the B ports. The Tri-Port Bus Exchanger has three 12-bit ports. Data may be transferred between the A port and either/both of the B ports. The latch enable (LE1B, LE2B, LEA1B and LEA2B) inputs control data storage. When a latch-enable input is HIGH, the latch is transparent. When a latch-enable input is LOW, the data at the input is latched and remains latched until the latch enable input is returned HIGH. Independent output enables (OE1B and OE2B) allow reading from one port while writing to the other port. The FCT16260AT/CT/ET are ideally suited for driving high capacitance loads and low impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The FCT162260AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times - reducing the need for external series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
OE1B LEA1B A-1B LATCH 1B1:12
12
LE1B 12 SEL OEA A1:12 12 M1 U X0 12 12
1B-A LATCH
12
12 LE2B
2B-A LATCH
12
LEA2B OE2B
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
A-2B LATCH
12
2B1:12
3032 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1996 Integrated Device Technology, Inc.
AUGUST 1996
DSC-3032/6
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IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN CONFIGURATIONS
OEA LE1B 2B3 GND 2B2 2B1 VCC A1 A2 A3 GND A4 A5 A6 A7 A8 A9 GND A10 A11 A12 VCC 1B1 1B2 GND 1B3 LE2B SEL
1 2 3 4 5 6 7 8 9 10 11 12 13
56 55 54 53 52 51 50 49 48 47 46 45 44
OE2B LEA2B 2B4 GND 2B5 2B6 VCC 2B7 2B8 2B9 GND 2B10 2B11 2B12 1B12 1B11 1B10 GND 1B9 1B8 1B7 VCC 1B6 1B5 GND 1B4 LEA1B OE1B
OEA LE1B 2B3 GND 2B2 2B1 VCC A1 A2 A3 GND A4 A5 A6 A7 A8 A9 GND A10 A11 A12 VCC 1B1 1B2 GND 1B3 LE2B SEL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 CERPACK TOP VIEW E56-1
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
OE2B LEA2B 2B4 GND 2B5 2B6 VCC 2B7 2B8 2B9 GND 2B10 2B11 2B12 1B12 1B11 1B10 GND 1B9 1B8 1B7 VCC 1B6 1B5 GND 1B4 LEA1B OE1B
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14 SO56-1 43 SO56-2 15 SO56-3 42 16 17 18 19 20 21 22 23 24 25 26 27 28 41 40 39 38 37 36 35 34 33 32 31 30 29
SSOP/ TSSOP/TVSOP TOP VIEW
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IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
PIN DESCRIPTION
Signal A(1:12) 1B(1:12) 2B(1:12) LEA1B LEA2B LE1B LE2B SEL I/O I/O I/O I/O I I I I I I I I Description Bidirectional Data Port A. Usually connected to the CPU's Address/Data bus. Bidirectional Data Port 1B. Connected to the even path or even bank of memory. Bidirectional Data Port 2B. Connected to the odd path or odd bank of memory. Latch Enable Input for A-1B Latch. The Latch is open when LEA1B is HIGH. Data from the A-port is latched on the HIGH to LOW transition of LEA1B. Latch Enable Input for A-2B Latch. The Latch is open when LEA2B is HIGH. Data from the A-Port is latched on the HIGH to LOW transition of LEA2B. Latch Enable Input for the 1B-A Latch. The Latch is open when LE1B is HIGH. Data from the 1B port is latched on the HIGH to LOW transition of LE1B. Latch Enable Input for the 2B-A Latch. The Latch is open when LE2B is HIGH. Data from the 2B port is latched on the HIGH to LOW transition of LE2B. 1B or 2B Path Selection. When HIGH, SEL enables data transfer from 1B Port to A Port. When LOW, SEL enables data transfer from 2B Port to A Port. Output Enable for A Port (Active LOW). Output Enable for 1B Port (Active LOW). Output Enable for 2B Port (Active LOW).
3032 tbl 01
OEA OE1B OE2B
ABSOLUTE MAXIMUM RATINGS
(1)
Unit V V C mA
FUNCTION TABLES
1B H L X X X X X 2B X X X H L X X
(2)
Symbol Description Max. VTERM(2) Terminal Voltage with Respect to -0.5 to +7.0 GND VTERM(3) Terminal Voltage with Respect to -0.5 to GND VCC +0.5 TSTG Storage Temperature -65 to +150 IOUT DC Output Current -60 to +120
Inputs SEL LE1B H H H L L L X
Inputs
LE2B X X X H H L X
OEA
L L L L L L H
Output A H L A(1) H L A(1) Z
3032 tbl 04
H H L X X X X
3032 tbl 02 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT.
Outputs
A H L
LEA1B LEA2B H H H H L L L X X X X H H L L H H L X X X X
OE1B OE2B
L L L L L L L H L H L L L L L L L L H H L L
1B H L H L B(1) B(1) B(1) Z Active Z Active
2B H L B(1) B(1) H L B(1) Z Z Active Active
CAPACITANCE (TA = +25C, F = 1.0MHZ)
Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6.0 8.0 Unit pF pF
3032 tbl 03
H L H L X X X X X
NOTE: 1. This parameter is measured at characterization but not tested.
3032 tbl 05 NOTES: 1. Output level before the indicated steady-state input conditions were established. 2. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance = LOW-to-HIGH Transition
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IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Commercial: TA = -40C to +85C, VCC = 5.0V 10%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL VIK IOS VH ICCL ICCH ICCZ Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) Input LOW Current (Input Input LOW Current (I/O (3-State Output pins) (5) VCC = Min., IIN = -18mA VCC = Max., VO = GND (3)
--
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC VI = GND VCC = Max. VO = 2.7V VO = 0.5V
Min. 2.0 -- -- -- -- -- -- -- -- -80 -- --
Typ.(2) --
-- -- -- -- -- -- -- -0.7 -140
Max.
--
Unit V V A
0.8 1 1 1 1 1 1
-1.2 -225 --
pins)(5)
pins)(5)
High Impedance Output Current Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current
A V mA mV A
100 5
VCC = Max., VIN = GND or VCC
500
3032 tbl 06
OUTPUT DRIVE CHARACTERISTICS FOR FCT16260T
Symbol IO VOH Parameter Output Drive Current Output HIGH Voltage Test Conditions(1) VCC = Max., VO = 2.5V(3) VCC = Min. VIN = VIH or VIL IOH = -3mA IOH = -12mA MIL. IOH = -15mA COM'L. IOH = -24mA MIL. IOH = -32mA COM'L.(4) VCC = Min. IOL = 48mA MIL. VIN = VIH or VIL IOL = 64mA COM'L. VCC = 0V, VIN or VO 4.5V Min. -50 2.5 2.4 2.0 -- -- Typ.(2)
--
Max.
-180
Unit mA V V V V A
3032 tbl 07
3.5 3.5 3.0 0.2 --
-- -- -- 0.55 1
VOL IOFF
Output LOW Voltage Input/Output Power Off Leakage(5)
OUTPUT DRIVE CHARACTERISTICS FOR FCT162260T
Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V (3) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOH = -16mA MIL. IOH = -24mA COM'L. IOL = 16mA MIL. IOL = 24mA COM'L. Min. 60 -60 2.4 -- Typ.(2) 115 -115 3.3 0.3 Max. 200 -200 -- 0.55 Unit mA mA V V
3032 lnk 08
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. The test limit for this parameter is 5A at TA = -55C.
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IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current (4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open One Output Port Enabled LExx = VCC One Input Bit Toggling One Output Bit Toggling 50% Duty Cycle VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle One Output Port Enabled LExx = VCC One Input Bit Toggling One Output Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle One Output Port Enabled LExx = VCC Twelve Input Bits Toggling Twelve Output Bits Toggling Min. -- -- Typ.(2) 0.5 60 Max. 1.5 100 Unit
mA A/ MHz
VIN = VCC VIN = GND
IC
Total Power Supply Current (6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
--
0.6
1.5
mA
--
0.9
2.3
VIN = VCC VIN = GND VIN = 3.4V VIN = GND
--
1.8
3.5 (5)
--
4.8
12.5 (5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
3032 tbl 09
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IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16260AT/162260AT Com'l. Symbol Parameter Mil. FCT16260CT/162260CT Com'l. Mil. FCT16260ET/162260ET Com'l. Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW
Propagation Delay AX to 1BX or Ax to 2BX Propagation Delay 1BX to AX or 2BX to AX Propagation Delay LEXB to AX Propagation Delay LEA1B to 1BX or LEA2B to 2BX Propagation Delay SEL to AX Output Enable Time OEA to AX, OE1B to 1BX, or OE2B to 2BX Output Disable Time OEA to AX, OE1B to 1BX, or OE2B to 2BX Set-Up Time, HIGH or LOW Data to Latch Hold Time, Latch to Data Pulse Width, Latch HIGH(4)
CL = 50pF RL = 500
1.5 1.5 1.5 1.5
5.2 5.6 5.2 4.7
1.5 1.5 1.5 1.5
5.6 5.9 5.6 5.2
1.5 1.5 1.5 1.5
4.7 5.0 4.7 4.4
1.5 1.5 1.5 1.5
5.1 5.4 5.1 4.8
1.5 1.5 1.5 1.5
3.6 3.6 4.0 4.0
-- -- -- --
-- -- -- --
ns ns ns ns
1.5 1.5
5.2 5.7
1.5 1.5
5.6 6.1
1.5 1.5
4.7 5.1
1.5 1.5
5.1 5.4
1.5 1.5
4.0 4.4
-- --
-- --
ns ns
1.5
4.4
1.5
4.8
1.5
4.0
1.5
4.4
1.5
4.0
--
--
ns
1.5 1.0 3.0 --
-- -- -- 0.5
1.5 1.5 3.0 --
-- -- -- 0.5
1.0 1.0 3.0 --
-- -- -- 0.5
1.0 1.5 3.0 --
-- -- -- 0.5
1.0 1.0 3.0 --
-- -- -- 0.5
-- -- -- --
-- -- -- --
ns ns ns ns
tSK(o) Output Skew (3)
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. 4. This parameter is guaranteed but not tested.
3032 tbl 10
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IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Open
3032 lnk 11 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Switch
Closed
3032 lnk 04
SET-UP, HOLD AND RELEASE TIMES
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
3032 lnk 05
PULSE WIDTH
tH
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
tREM
1.5V
3032 lnk 06
tSU
tH
PROPAGATION DELAY
3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V
3032 lnk 07
ENABLE AND DISABLE TIMES
ENABLE DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED tPZH SWITCH OPEN 1.5V 0V 3.5V 1.5V tPHZ 0.3V VOH 0V
3032 lnk 08
SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL
tPLZ
1.5V 0V 3.5V 0.3V VOL
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns
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IDT54/74FCT16260AT/CT/ET, 162260AT/CT/ET FAST CMOS 12-BIT TRI-PORT BUS EXCHANGER
MILITARY AND COMMERCIAL TEMPERATURES RANGES
ORDERING INFORMATION
IDT FCT XXXX X Device Temperature Type Range X Package X Process
Blank B PV PA PF E
Commercial MIL-STD-883, Class B Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) CERPACK (E56-1)
16260AT 12-Bit Tri-Port Bus Exchanger 16260CT 16260ET 162260AT 162260CT 162260ET 54 74 -55C to +125C -40C to +85C
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